A novel method of low temperature, pressureless interconnection for wafer level scale 3D packaging
Author:
Affiliation:
1. National Taiwan University,Department of Materials Science and Engineering,Taipei,R. O. C.
Funder
Ministry of Science and Technology
National Taiwan University
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9816066/9816372/09816429.pdf?arnumber=9816429
Reference13 articles.
1. Self-assembly of reduced Au atoms for vertical interconnections in three dimensional integrated circuits
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4. Lateral and cross-lateral focusing of spherical particles in a square microchannel
5. Copper pillar bump technology progress overview
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2. Low-Temperature and Pressureless Cu-to-Cu Bonding by Electroless Pd Plating using Microfluidic System;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05
3. Fluidic-chemical characteristics of electroless copper deposition of ordered mass-fabricated pillars in a microchannel for chip packaging applications;Chemical Engineering Science;2023-04
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