The Optimal Solution of Fan-Out Embedded Bridge (FO-EB) Package Evaluation during the Process and Reliability Test
Author:
Affiliation:
1. Cooperate R&D, Siliconware Precision Industries Co. Ltd.,Taichung,Taiwan, R.O.C.,427
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9816066/9816372/09816556.pdf?arnumber=9816556
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3. Stress Simulation and Design Optimal Study for Cu PillarBump Structure;lin;EPTC,2013
4. Below 45nm low-k layer stress minimization guide for high-performance flip-chip packages with copper pillar bumping
5. Enhance Larger FCBGA Package Evaluation and Characterization
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