A 0.35μ CMOS Comparator Circuit For High-Speed ADC Applications
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/9898/31469/01466040.pdf?arnumber=1466040
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Design and Implementation of Low Power Comparator Based Flash ADC;International Journal of Advanced Research in Science, Communication and Technology;2024-05-15
2. Design of AD Converters in 0.35 µm SiGe BiCMOS Technology for Ultra-Wideband M-Sequence Radar Sensors;Sensors;2024-04-29
3. Improving Input Circuits for 7-bit Flash AD Converter;2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA);2020-04
4. A Low Noise Low Offset Readout Circuit for Magnetic-Random-Access-Memory;IEEE Transactions on Circuits and Systems I: Regular Papers;2018-04
5. High Speed Min/Max Architecture Based on a Novel Comparator in 0.18-μm CMOS Process;Journal of Circuits, Systems and Computers;2015-03-04
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