Physics of hole trapping process in high-k gate stacks: A direct simulation formalism for the whole interface system combining density-functional theory and Marcus theory

Author:

Liu Yue-Yang,Jiang Xiangwei

Publisher

IEEE

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Distinguishing the Charge Trapping Centers in CaF2-Based 2D Material MOSFETs;Nanomaterials;2024-06-16

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3. Vertical Charge Loss Induced by Defect Coupling at SiO2/Si3N4 Interface in 3D NAND Flash Memory;2023 IEEE 6th International Conference on Electronic Information and Communication Technology (ICEICT);2023-07-21

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5. Charge Carriers Trapping by the Full-Configuration Defects in Metal Halide Perovskites Quantum Dots;The Journal of Physical Chemistry Letters;2022-09-19

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