Comprehensive performance re-assessment of TFETs with a novel design by gate and source engineering from device/circuit perspective-Reference-Cited by-同舟云学术

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Comprehensive performance re-assessment of TFETs with a novel design by gate and source engineering from device/circuit perspective

Published:2014-12 Issue: Volume: Page:
ISSN:
Container-title:2014 IEEE International Electron Devices Meeting
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Author:

Huang Qianqian,Ru Huang ,Chunlei Wu ,Hao Zhu ,Cheng Chen ,Jiaxin Wang ,Lingyi Guo ,Runsheng Wang ,Le Ye ,Yangyuan Wang

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7038718/7046955/07047044.pdf?arnumber=7047044

Cited by 27 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology;Nanomaterials;2024-05-09

2. Sensitivity Analysis of a Double Source Stack Lateral TFET-Based Gas Sensor;ECS Journal of Solid State Science and Technology;2024-02-01

3. Dielektrisch modulierter Biosensor basierend auf vertikalem Tunnel-Feldeffekt-Transistor;Intelligente Nano-Bio-Geräte der nächsten Generation;2024

4. Cryogenic Hysteresis in 110 nm Bulk Silicon MOSFETs for Capacitorless Memory Applications;IEEE Electron Device Letters;2023-09

5. Analysis of the Impact of Interface Trap Charges on the Analog/RF Performance of a Graphene Nanoribbon Vertical Tunnel FET;Journal of Electronic Materials;2023-08-04

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