Author:
Jambagi Savitri Basappa,Yellampalli Siva S.
Cited by
4 articles.
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1. Reduction of Toggling Activity Using Novel LFSR Driven Logic for ULSI Circuits;2023 International Conference on Next Generation Electronics (NEleX);2023-12-14
2. Performance Analysis of a New Low Power BIST Technique in VLSI Circuit by Reducing the Input Vectors;2023 6th International Conference on Electrical Information and Communication Technology (EICT);2023-12-07
3. A Proposal for Low Power Test Pattern Generator;2022 4th International Conference on Smart Systems and Inventive Technology (ICSSIT);2022-01-20
4. Smart Logic Built in Self-Test in SOC;2020 5th IEEE International Conference on Recent Advances and Innovations in Engineering (ICRAIE);2020-12-01