Node resource management for DSP applications on 3D Network-on-Chip architecture-Reference-Cited by-同舟云学术

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Node resource management for DSP applications on 3D Network-on-Chip architecture

Published:2009-07 Issue: Volume: Page:
ISSN:
Container-title:2009 16th International Conference on Digital Signal Processing
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Author:

Anagnostopoulos Iraklis,Bartzas Alexandros,Vourkas Ioannis,Soudris Dimitrios

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5176123/5201043/05201090.pdf?arnumber=5201090

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 16-nm 784-Core Digital Signal Processor Array, Assembled as a 2 × 2 Dielet With 10-μm Pitch Interdielet I/O for Runtime Multiprogram Reconfiguration;IEEE Journal of Solid-State Circuits;2023-01

2. V-CastNet3D: A novel clustering-based mapping in 3-D Network on chip;Nano Communication Networks;2018-12

3. A New Static Cost-Effective Parameter for Interconnection Networks of Massively Parallel Computer Systems;Soft Computing in Data Analytics;2018-08-22

4. Static Cost-Effective Analysis of a Shifted Completely Connected Network;Advances in Intelligent Systems and Computing;2018-07-04

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