Silicon MOSFETs (conventional and non-traditional) at the scaling limit
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/7053/18985/00877067.pdf?arnumber=877067
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A Physics-Based Compact Model for Silicon Cold-Source Transistors;IEEE Transactions on Electron Devices;2023-04
2. An analytical threshold voltage model for a short-channel dual-metal-gate (DMG) recessed-source/drain (Re-S/D) SOI MOSFET;Superlattices and Microstructures;2013-08
3. An analytical drain current model for dual material engineered cylindrical/surrounded gate MOSFET;Microelectronics Journal;2012-01
4. High-frequency compact analytical noise model of gate-all-around MOSFETs;Semiconductor Science and Technology;2010-02-05
5. High frequency and noise model of gate-all-around metal-oxide-semiconductor field-effect transistors;Journal of Applied Physics;2009-04
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