Author:
Ghosh Pujarini,Haldar Subhasis,Gupta R.S,Gupta Mridula
Reference37 articles.
1. J.D. Plummer, Silicon MOSFETs (conventional and non-traditional) at the scaling limit, in: Proceedings of the 58th Device Research Conference, 2000, pp. 3–6.
2. Modeling the effect of source/drain junction depth on bulk-MOSFET scaling;Murali;Solid-State Electronics,2007
3. Double-gate SOI devices for low-power and high-performance applications;Roy;VLSI Design,2006
4. Design and performance analysis of double-gate MOSFET over single-gate MOSFET for RF switch;Srivastava;Microelectronics Journal,2011
5. Reliability comparison of triple-gate versus planar SOI FETs;Crupi;IEEE Electron Devices,2006
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