Room-Temperature Direct Cu Semi-Additive Plating (SAP) Bonding for Chip-on-Wafer 3D Heterogenous Integration With μLED-Reference-Cited by-同舟云学术

Room-Temperature Direct Cu Semi-Additive Plating (SAP) Bonding for Chip-on-Wafer 3D Heterogenous Integration With μLED

Published:2023-03 Issue:3 Volume:44 Page:500-503
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Susumago Yuki¹^ORCID,Liu Chang¹^ORCID,Hoshi Tadaaki¹,Shen Jiayi¹^ORCID,Shinoda Atsushi²,Kino Hisashi³^ORCID,Tanaka Tetsu³^ORCID,Fukushima Takafumi⁴^ORCID

Affiliation:

1. Department of Mechanical Systems Engineering, Tohoku University, Sendai, Japan

2. School of Mechanical Engineering, Tohoku University, Sendai, Japan

3. Department of Biomedical Engineering, Tohoku University, Sendai, Japan

4. Department of Mechanical Systems Engineering and the Department of Biomedical Engineering, Tohoku University, Sendai, Japan

Funder

JSPS KAKENHI Grants-in-Aid for Scientific Research

Tateishi Science and Technology Foundation, Research Grant

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/55/10053585/10021594.pdf?arnumber=10021594

Reference14 articles.

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2. Low-temperature multichip-to-wafer 3D integration based on via-last TSV with OER-TEOS-CVD and microbump bonding without solder extrusion

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4. A room temperature flip-chip technology for high pixel count microdisplays and imaging arrays;marion;Proc IEEE 66th Electron Compon Technol Conf (ECTC),2016

5. Wafer Direct Technology for Mini LED Flip Attachment

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