Comparator with built-in reference voltage generation and split-ROM encoder for a high-speed flash ADC-Reference-Cited by-同舟云学术

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Comparator with built-in reference voltage generation and split-ROM encoder for a high-speed flash ADC

Published:2015-07 Issue: Volume: Page:
ISSN:
Container-title:2015 International Symposium on Signals, Circuits and Systems (ISSCS)
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Author:

Chen Yong,Mak Pui-In,Yang Jiale,Yue Ruifeng,Wang Yan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7180553/7203913/07203923.pdf?arnumber=7203923

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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2. Design of Dynamic Latched Comparator Using the Offset Calibration Technique;2023 3rd International Conference on Smart Generation Computing, Communication and Networking (SMART GENCON);2023-12-29

3. Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review;IEEE Access;2023

4. A 90‐ to 115‐GHz superheterodyne receiver front‐end for W‐band imaging system in 28‐nm complementary metal‐oxide‐semiconductor;International Journal of Circuit Theory and Applications;2022-11-22

5. A 0.006-mm²6-to-20-Gb/s NRZ Bang-Bang Clock and Data Recovery Circuit With Dual-Path Loop;2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2022-11-11

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