Author:
Hauck S.,Burns S.,Borriello G.,Ebeling C.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software,Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
47 articles.
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1. An Efficient Design Flow for Iterative Asynchronous Bundled-Data Circuits on FPGA;2024 9th International Conference on Integrated Circuits, Design, and Verification (ICDV);2024-06-06
2. An Improved Design of Low Power High Speed Configurable Logic Block using 90nm CMOS Technology;2023 7th International Conference on Computing Methodologies and Communication (ICCMC);2023-02-23
3. An Energy Efficient Architecture of Configurable Logic Block Using Pass Transistor for FPGA;2023 Third International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT);2023-01-05
4. Asynchronous Circuit Test IP Core Based on OLFSR and FPGA Implementation;2022 2nd International Conference on Computer Science, Electronic Information Engineering and Intelligent Control Technology (CEI);2022-09-23
5. General Approach to Asynchronous Circuits Simulation Using Synchronous FPGAs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021