Author:
Li Zhenhao,Hu Wei,Chen Shuang
Cited by
11 articles.
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1. Design and Implementation of SM4 Coprocessor Based on RISC-V;2023 3rd International Symposium on Computer Technology and Information Science (ISCTIS);2023-07-07
2. Enhancement in IoT through Custom Instruction Set Architectures and TinyML: Review;2023 International Conference on Computer, Electronics & Electrical Engineering & their Applications (IC2E3);2023-06-08
3. Reconfigurable CNN Accelerator Embedded in Instruction Extended RISC-V Core;2023 6th International Conference on Electronics Technology (ICET);2023-05-12
4. Design and implementation of a speech recognition module based on RISC-V embedded processor;2023 8th International Conference on Intelligent Computing and Signal Processing (ICSP);2023-04-21
5. The Design of Optimized RISC Processor for Edge Artificial Intelligence Based on Custom Instruction Set Extension;IEEE Access;2023