Single Event Upsets in a 130 nm Hardened Latch Design Due to Charge Sharing

Author:

Amusan O.A.,Stemberg A.L.,Witulski A.F.,Bhuva B.L.,Black J.D.,Baze M.P.,Massengill L.W.

Publisher

IEEE

Cited by 41 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. Hybrid pixel readout integrated circuits;Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment;2023-12

3. A Low Power-Consumption Triple-Node-Upset-Tolerant Latch Design;Journal of Electronic Testing;2022-02

4. МОДЕЛИРОВАНИЕ В ЦИЛИНДРИЧЕСКИХ КООРДИНАТАХ ВОЗДЕЙСТВИЯ ТЗЧ НА МОП-СТРУКТУРУ ДЛЯ ОЦЕНКИ СЕЧЕНИЯ СБОЯ, "Электронная техника. Серия 3. Микроэлектроника";Электронная техника. Серия 3. Микроэлектроника;2022

5. Investigation of Buried-Well Potential Perturbation Effects on SEU in SOI DICE-Based Flip-Flop Under Proton Irradiation;IEEE Transactions on Nuclear Science;2021-06

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