0.35μm, 30V fully isolated and low-Ron nLDMOS for DC-DC applications-Reference-Cited by-同舟云学术

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0.35μm, 30V fully isolated and low-Ron nLDMOS for DC-DC applications

Published:2013-05 Issue: Volume: Page:
ISSN:
Container-title:2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)
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Author:

Lee Kyungho,Jeon Haeung,Cho Byunghee,Cho Joonhee,Pang Yon-Sup,Moon Jinwoo,Kwon Susanna,Hebert Francois,Lee Junghwan,Lee Taejong

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6684693/6694389/06694454.pdf?arnumber=6694454

Cited by 14 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Source Segmented LDMOS Structure for Improving Single Event Burnout Tolerance Based on High-Voltage BCD Process;IEEE Transactions on Device and Materials Reliability;2024-03

2. Experiments of a Novel Low-Voltage LDMOS With Ultrashallow Low-Resistance Path Modulated by Bulk Superjunction;IEEE Transactions on Electron Devices;2024-01

3. A Physics-Based Compact Model for the Static Drain Current in Heterojunction Barrier CNTFETs—Part II: Scattering, High-Field Effects, and Model Verification;IEEE Transactions on Electron Devices;2024-01

4. Design and Simulation Optimization of an Ultra-Low Specific On-Resistance LDMOS Device;IEEE Journal of the Electron Devices Society;2024

5. Novel Si/SiC heterojunction lateral double-diffused metal oxide semiconductor field effect transistor with low specific on-resistance by super junction layer;Micro and Nanostructures;2022-08

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