A Source Segmented LDMOS Structure for Improving Single Event Burnout Tolerance Based on High-Voltage BCD Process-Reference-Cited by-同舟云学术

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A Source Segmented LDMOS Structure for Improving Single Event Burnout Tolerance Based on High-Voltage BCD Process

Published:2024-03 Issue:1 Volume:24 Page:105-111
ISSN:1530-4388
Container-title:IEEE Transactions on Device and Materials Reliability
language:
Short-container-title:IEEE Trans. Device Mater. Relib.

Author:

Xu Jiang¹^ORCID,Lei Zeyu¹^ORCID,Zhang Chenchen²,Wan Xin²^ORCID,Chen Zhuojun³^ORCID

Affiliation:

1. School of Physics and Electronics, Hunan University, Changsha, China

2. Center for High Reliability Power Semiconductor, Yangtze Delta Region Institute of Tsinghua University, Jiaxing, China

3. College of Semiconductors (College of Integrated Circuits), Hunan University, Changsha, China

Funder

“Pioneer” and “Leading Goose” Research and Development Program of Zhejiang Province

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/7298/10463650/10380792.pdf?arnumber=10380792

Reference22 articles.

1. on-Resistance Degradation Induced by Hot-Carrier Injection in SOI SJ-LDMOS

2. 0.35μm, 30V fully isolated and low-Ron nLDMOS for DC-DC applications

3. Analysis and modeling of minority carrier injection in deep-trench based BCD technologies

4. Comprehensive study of the radiation effects on the LDMOS transistors

5. Single event effects and total ionising dose in 600V Si-on-SiC LDMOS transistors for rad-hard space applications

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