META: A Layout Based Tool to Estimate the Vulnerability of Digital Circuits to Multiple Event Transient
Author:
Affiliation:
1. Concordia University,Department of Electrical and Computer Engineering,Montreal,Canada
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9841660/9841947/09842148.pdf?arnumber=9842148
Reference12 articles.
1. Soft error rate estimation of digital circuits in the presence of Multiple Event Transients (METs)
2. Estimation of single-event transient pulse characteristics for predictive analysis
3. A Layout-Based Soft Error Rate Estimation and Mitigation in the Presence of Multiple Transient Faults in Combinational Logic
4. A layout-based approach for multiple event transient analysis
5. Single event multiple transient (SEMT) measurements in 65 nm bulk technology
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