Single event multiple transient (SEMT) measurements in 65 nm bulk technology
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/8082474/8093090/08093192.pdf?arnumber=8093192
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
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4. META: A Layout Based Tool to Estimate the Vulnerability of Digital Circuits to Multiple Event Transient;2022 20th IEEE Interregional NEWCAS Conference (NEWCAS);2022-06-19
5. Layout-based Vulnerability Analysis of LEON3 Processor to Single Event Multiple Transients using Satisfiability Modulo Theories;2022 23rd International Symposium on Quality Electronic Design (ISQED);2022-04-06
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