A high-performance 0.25- mu m CMOS technology. II. Technology-Reference-Cited by-同舟云学术

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A high-performance 0.25- mu m CMOS technology. II. Technology

Published:1992-04 Issue:4 Volume:39 Page:967-975
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Davari B.,Chang W.H.,Petrillo K.E.,Wong C.Y.,Moy D.,Taur Y.,Wordeman M.R.,Sun J.Y.-C.,Hsu C.C.-H.,Polcari M.R.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx1/16/3572/00127490.pdf?arnumber=127490

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1. Silicide and germanide technology for contacts and gates in MOSFET applications;Thin Solid Films;2008-11

2. High-Performance and Low-Cost 0.15->tex<$muhbox m$>/tex<nMOSFETs Using Simultaneous N-Gate and Source/Drain Doping Process;IEEE Transactions on Electron Devices;2004-01

3. Effect of Gate Electrode Structure on Gate Oxide Integrity;Electrochemical and Solid-State Letters;2003

4. Comparative study of double ion implant Ti salicide and pre-amorphization implant Co salicide for ultra-large-scale integration applications;Semiconductor Science and Technology;2002-09-04

5. On the high-performance Ti-salicide ULSI CMOS devices prepared by a borderless contact technique and double-implant structure;Semiconductor Science and Technology;2002-02-18

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