On the high-performance Ti-salicide ULSI CMOS devices prepared by a borderless contact technique and double-implant structure-Reference-Cited by-同舟云学术

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On the high-performance Ti-salicide ULSI CMOS devices prepared by a borderless contact technique and double-implant structure

Published:2002-02-18 Issue:3 Volume:17 Page:205-210
ISSN:0268-1242
Container-title:Semiconductor Science and Technology
language:
Short-container-title:Semicond. Sci. Technol.

Author:

Thei Kong-Beng,Chuang Hung-Ming,Yu Kuo-Hui,Liu Wen-Chau,Liu Rong-Chau,Lin Kun-Wei,Su Chi-Wen,Ho Chin-Shiung,Wuu Shou-Gwo,Wang Chung-Shu

Publisher

IOP Publishing

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference15 articles.

1. Matching properties of linear MOS capacitors

2. A high-performance 0.25- mu m CMOS technology. II. Technology

3. A two-dimensional numerical simulation of oxide charge buildup in MOS transistors due to radiation

4. Device scaling effects on hot-carrier induced interface and oxide-trapped charge distributions in MOSFETs

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design on Formation of Nickel Silicide by a Low‐Temperature Pulsed Laser Annealing Method to Reduce Contact Resistance for CMOS Inverter and 6T‐SRAM on a Wafer‐Scale Flexible Substrate;Advanced Electronic Materials;2023-10-15

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