A radix-2 FFT algorithm for modern single instruction multiple data (SIMD) architectures
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2 articles.
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1. Systolic Array-Based Many-Core Processor with Simultaneous Dual-Instruction Issuance;14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART'24));2024-06-19
2. Scalable dual-instruction multiple-data processing on an efficient systolic-array architecture;2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2024-05-27