General models and a reduction design technique for FPGA switch box designs

Author:

Hongbing Fan ,Jiping Liu ,Yu-Liang Wu

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Cited by 14 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Wideband high-isolation SPDT RF switch in 0.18- $$\upmu$$ μ m SiGe BiCMOS technology;Analog Integrated Circuits and Signal Processing;2016-02-11

2. High-Density and High-Reliability Nonvolatile Field-Programmable Gate Array With Stacked 1D2R RRAM Array;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2016-01

3. Comment on “On Optimal Hyperuniversal and Rearrangeable Switch Box Designs”;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2015-07

4. Hyper-Universal Switch Network for FPIC Design;2013 Seventh International Conference on Complex, Intelligent, and Software Intensive Systems;2013-07

5. Interlaced switch boxes placement for three-dimensional FPGA architecture design;International Journal of Circuit Theory and Applications;2010-11-04

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