A 2$\,\times\,$25-Gb/s Receiver With 2:5 DMUX for 100-Gb/s Ethernet-Reference-Cited by-同舟云学术

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A 2$\,\times\,$25-Gb/s Receiver With 2:5 DMUX for 100-Gb/s Ethernet

Published:2010-11 Issue: Volume: Page:
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Wu Ke-Chung,Lee Jri

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/5607212/05599881.pdf?arnumber=5599881

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 10-Gb/s 275-fsec Jitter Cryo-CMOS Charge-Sampling CDR for Quantum Computing Application;IEEE Microwave and Wireless Technology Letters;2023-06

2. A 26-Gb/s CMOS optical receiver with a reference-less CDR in 65-nm CMOS;Journal of Semiconductors;2022-07-01

3. A Low Jitter Digital Loop CDR Based 8–16 Gbps SerDes in 65 nm CMOS Technology;2021 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID);2021-02

4. An Inductorless 20-Gb/s CDR With High Jitter Tolerance;IEEE Journal of Solid-State Circuits;2019-10

5. DDJ-Adaptive SAR TDC-Based Timing Recovery for Multilevel Signaling;IEEE Journal of Solid-State Circuits;2019-10

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