A 12.8-Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth, Large-Capacity Storage Systems-Reference-Cited by-同舟云学术

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A 12.8-Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth, Large-Capacity Storage Systems

Published:2019-04 Issue:4 Volume:54 Page:1086-1095
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Tsubouchi Yuta^ORCID,Miyashita Daisuke^ORCID,Toi Takashi^ORCID,Satoh Yuji,Tachibana Fumihiko^ORCID,Wadatsumi Junji,Morimoto Makoto,Fujimoto Ryuichi,Deguchi Jun^ORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/8674728/08613011.pdf?arnumber=8613011

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An all-digital built-in-self-test scheme for duty cycle corrector with de-skew circuit in NAND Flash memory;Microelectronics Journal;2023-11

2. A 25.6-Gb/s Interface Employing PAM-4-Based Four-Channel Multiplexing and Cascaded Clock and Data Recovery Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems;IEEE Journal of Solid-State Circuits;2022-05

3. DDR RF Interference in Fan-less SoC Design;2021 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS);2021-12-13

4. Characterization and modeling of on-chip via stacks for RF-CMOS applications;IEICE Electronics Express;2020

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