An all-digital built-in-self-test scheme for duty cycle corrector with de-skew circuit in NAND Flash memory-Reference-Cited by-同舟云学术

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An all-digital built-in-self-test scheme for duty cycle corrector with de-skew circuit in NAND Flash memory

Published:2023-11 Issue: Volume:141 Page:105947
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Hai Ya,Liu Fei^ORCID,Wang Yongshan,Kang Jing

Funder

National Key Research and Development Program of China Stem Cell and Translational Research

Beijing Municipal Science and Technology Commission

National Key Research and Development Program of China

Beijing Science and Technology Planning Project

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference18 articles.

1. A 12.8-Gb/s daisy chain-based downlink I/F employing spectrally compressed multi-band multiplexing for high-bandwidth, large-capacity storage systems;Tsubouchi;IEEE J. Solid-State Circuits,2019

2. A 25.6-Gb/s interface employing PAM-4-based four-channel multiplexing and cascaded clock and data recovery circuits in ring topology for high-bandwidth and large-capacity storage systems;Toi;IEEE J. Solid-State Circuits,2022

3. 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip;Kim,2015

4. A 1.2V 1.33Gb/s/pin 8Tb NAND flash memory multi-chip package employing F-chip for low power and high performance storage applications;Kim,2017

5. A 1.8-Gb/s/Pin 16-Tb NAND flash memory multi-chip package with F-chip for high-performance and high-capacity storage;Na;IEEE J. Solid-State Circuits,2021

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