A 7T-NDR Dual-Supply 28-nm FD-SOI Ultra-Low Power SRAM With 0.23-nW/kB Sleep Retention and 0.8 pJ/32b Access at 64 MHz With Forward Back Bias-Reference-Cited by-同舟云学术

A 7T-NDR Dual-Supply 28-nm FD-SOI Ultra-Low Power SRAM With 0.23-nW/kB Sleep Retention and 0.8 pJ/32b Access at 64 MHz With Forward Back Bias

Published:2023-03 Issue:3 Volume:70 Page:1311-1323
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Kneip Adrian¹^ORCID,Bol David¹^ORCID

Affiliation:

1. ICTEAM Institute, UCLouvain, Louvain-la-Neuve, Belgium

Funder

Fonds National de la Recherche Scientifique (FNRS), Belgium

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture

Link

http://xplorestaging.ieee.org/ielx7/8919/10052778/10005050.pdf?arnumber=10005050

Reference27 articles.

1. A 65nm 16kb SRAM with 131.5 pW leakage at 0.9 V for wireless IoT sensor nodes;gupta;Proc IEEE Symp VLSI Circuits,2020

2. Low Leakage SOI CMOS Static Memory Cell With Ultra-Low Power Diode

3. Threshold Voltage Model for Short-Channel Undoped Symmetrical Double-Gate MOSFETs

4. SleepRider: a 5.5μW/MHz Cortex-M4 MCU in 28nm FD-SOI with ULP SRAM, Biomedical AFE and Fully-Integrated Power, Clock and Back-Bias Management

5. A 20nm 112Mb SRAM in high-? metal-gate with assist circuitry for low-leakage and low-VMIN applications;chang;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2013

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