An FPGA-SoC based Hardware Acceleration of Convolutional Neural Networks-Reference-Cited by-同舟云学术

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An FPGA-SoC based Hardware Acceleration of Convolutional Neural Networks

Published:2022-05-28 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE 9th International Conference on Sciences of Electronics, Technologies of Information and Telecommunications (SETIT)
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Author:

Bouaafia Soulef¹,Messaoud Seifeddine¹,Khemiri Randa¹,Sayadi Fatma Ezahra²

Affiliation:

1. Monastir University,Lab. Electronics & Microelectronics Faculty of Sciences of Monastir,Monastir,Tunisia

2. Sousse University,Lab. Networked Objects Control and Communication Systems National Engineering School of Sousse,Sousse,Tunisia

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9875397/9875429/09875430.pdf?arnumber=9875430

Reference20 articles.

1. Optimisation of HEVC motion estimation exploiting SAD and SSD GPU‐based implementation

2. Parallel Full Search Algorithm for Motion Estimation on Graphic Processing Unit

3. Real-time motion estimation diamond search algorithm for the new high efficiency video coding on FPGA

4. EIE

5. Xilinx Vivado High Level Synthesis: Case studies

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Hardware Acceleration For Deep Learning Model;2023 International Conference on Microelectronics (ICM);2023-12-17

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