Data content scrubbing approach for SRAM based FPGA designs-Reference-Cited by-同舟云学术

Data content scrubbing approach for SRAM based FPGA designs

Published:2022-06-01 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE 31st International Symposium on Industrial Electronics (ISIE)
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Author:

Gomez-Cornejo J.¹,Villalta I.²,Aranzabal I.¹,Lopez I.¹,Zuloaga A.²

Affiliation:

1. University of the Basque Country UPV/EHU,Dept. of Electrical Engineering,Bilbao,Spain

2. University of the Basque Country UPV/EHU,Dept. of Electronic Technology,Bilbao,Spain

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9831187/9831454/09831467.pdf?arnumber=9831467

Reference34 articles.

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2. Vivado design suite user guide. partial reconfiguration UG909 (v2019. 2);Xilinx Documentation,0

3. 7 series FPGAs configurable logic block UG474 (v1. 8);Xilinx Documentation,2016

4. A novel BRAM content accessing and processing method based on FPGA configuration bitstream

5. Interface tasks oriented 8-bit soft-core processor

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