A First-Order Continuous-Time Noise-Shaping SAR ADC with Duty-Cycled Integrator-Reference-Cited by-同舟云学术

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A First-Order Continuous-Time Noise-Shaping SAR ADC with Duty-Cycled Integrator

Published:2022-06-12 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
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Author:

Li Hanyue¹,Shen Yuting¹,Cantatore Eugenio¹,Harpe Pieter¹

Affiliation:

1. Eindhoven University of Technology,Eindhoven,the Netherlands

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9830116/9830138/09830373.pdf?arnumber=9830373

Reference4 articles.

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 0.021mm² 92dB-SNDR 88kHz-BW Incremental Zoom ADC with 2^nd-order RT-DEM and Quiet Chopping;ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC);2023-09-11

2. A 13.2fJ/step 74.3-dB SNDR Pipelined Noise-shaping SAR+VCO ADC;ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC);2023-09-11

3. A 77.3-dB SNDR 62.5-kHz Bandwidth Continuous-Time Noise-Shaping SAR ADC With Duty-Cycled G_m-C Integrator;IEEE Journal of Solid-State Circuits;2023-04

4. Design Techniques for Energy-Efficient Analog-to-Digital Converters;IEEE Open Journal of the Solid-State Circuits Society;2023

5. Noise-Shaping SAR ADCs: From Discrete Time to Continuous Time;Biomedical Electronics, Noise Shaping ADCs, and Frequency References;2012-02-24

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