A 77.3-dB SNDR 62.5-kHz Bandwidth Continuous-Time Noise-Shaping SAR ADC With Duty-Cycled G<sub>m</sub>-C Integrator-Reference-Cited by-同舟云学术

A 77.3-dB SNDR 62.5-kHz Bandwidth Continuous-Time Noise-Shaping SAR ADC With Duty-Cycled G_m-C Integrator

Published:2023-04 Issue:4 Volume:58 Page:939-948
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Li Hanyue¹^ORCID,Shen Yuting¹^ORCID,Cantatore Eugenio¹^ORCID,Harpe Pieter¹^ORCID

Affiliation:

1. Department of Electrical Engineering, Eindhoven University of Technology, Eindhoven, The Netherlands

Funder

Dutch Research Council

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/10082904/09989513.pdf?arnumber=9989513

Reference29 articles.

1. 27.5 An 80 MHz-BW 640MS/s time-interleaved passive noise-shaping SAR ADC in 22 nm FDSOI process;lin;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2021

2. A Calibration-Free Time-Interleaved Fourth-Order Noise-Shaping SAR ADC

3. A 13.8-ENOB Fully Dynamic Third-Order Noise-Shaping SAR ADC in a Single-Amplifier EF-CIFF Structure With Hardware-Reusing kT/C Noise Cancellation

4. A Configurable Noise-Shaping Band-Pass SAR ADC With Two-Stage Clock-Controlled Amplifier

5. A Cascaded Noise-Shaping SAR Architecture for Robust Order Extension

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1. Oversampling ADC: A Review of Recent Design Trends;IEEE Access;2024

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3. Guest Editorial Introduction to the Special Issue on the 2022 Symposium on VLSI Circuits;IEEE Journal of Solid-State Circuits;2023-04