Scaling Dual-Gate Ultra-thin a-IGZO FET to 30 nm Channel Length with Record-high G<sub>m,max</sub> of 559 µS/µm at V<sub>DS</sub>=1 V, Record-low DIBL of 10 mV/V and Nearly Ideal SS of 63 mV/dec-Reference-Cited by-同舟云学术

Scaling Dual-Gate Ultra-thin a-IGZO FET to 30 nm Channel Length with Record-high G_m,max of 559 µS/µm at V_DS=1 V, Record-low DIBL of 10 mV/V and Nearly Ideal SS of 63 mV/dec

Published:2022-06-12 Issue: Volume: Page:
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Container-title:2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
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Author:

Chen Kaifei¹,Niu Jiebin¹,Yang Guanhua¹,Liu Menggan¹,Lu Wendong¹,Liao Fuxi¹,Huang Kailiang¹,Duan XinLv¹,Lu Congyan¹,Wang Jiawei¹,Wang Lingfei¹,Li Mengmeng¹,Geng Di¹,Zhao Chao²,Wang Guilei²,Lu Nianduan¹,Li Ling¹,Liu Ming¹

Affiliation:

1. Chinese Academy of Sciences,Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics,Beijing,China

2. Beijing Superstring Academy of Memory Technology,P.R.China,100176

Funder

National Natural Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9830116/9830138/09830389.pdf?arnumber=9830389

Reference11 articles.

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