Low-Power SAR ADC Design: Overview and Survey of State-of-the-Art Techniques-Reference-Cited by-同舟云学术

Low-Power SAR ADC Design: Overview and Survey of State-of-the-Art Techniques

Author:

Tang Xiyuan¹^ORCID,Liu Jiaxin²^ORCID,Shen Yi³^ORCID,Li Shaolan⁴^ORCID,Shen Linxiao⁵^ORCID,Sanyal Arindam⁶^ORCID,Ragab Kareem⁷^ORCID,Sun Nan⁸^ORCID

Affiliation:

1. Institute for Artificial Intelligence and the School of Integrated Circuit, Peking University, Beijing, China

2. Institute of Integrated Circuits and Systems, University of Electronic Science and Technology of China, Chengdu, China

3. Hangzhou Institute of Technology, Xidian University, Hangzhou, China

4. Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA

5. School of Integrated Circuit, Peking University, Beijing, China

6. School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ, USA

7. Broadcom, Inc., Irvine, CA, USA

8. Department of Electrical Engineering, Tsinghua University, Beijing, China

Funder

National Key Research and Development Program of China

NSFC

Higher Education Discipline Innovation Project

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture

Link

Reference108 articles.

4. 11.4 A 1.5 mW 68dB SNDR 80MS/s 2$\times$ interleaved SAR-assisted pipelined ADC in 28nm CMOS;van der goes;IEEE ISSCC Dig Tech Papers,2014

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