Energy-Efficient Single-Ended Read/Write 10T Near-Threshold SRAM-Reference-Cited by-同舟云学术

Energy-Efficient Single-Ended Read/Write 10T Near-Threshold SRAM

Published:2023-05 Issue:5 Volume:70 Page:2037-2047
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Abbasian Erfan¹^ORCID,Sofimowloodi Sobhan²^ORCID

Affiliation:

1. Department of Electrical and Computer Engineering, Babol Noshirvani University of Technology, Babol, Iran

2. Department of Electrical Engineering, Amirkabir University of Technology, Tehran, Iran

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture

Link

http://xplorestaging.ieee.org/ielx7/8919/10109891/10056424.pdf?arnumber=10056424

Reference40 articles.

1. A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD–SOI

2. A write bit-line free sub-threshold SRAM cell with fully half-select free feature and high reliability for ultra-low power applications

3. A Differential Data-Aware Power-Supplied (D$^{2}$AP) 8T SRAM Cell With Expanded Write/Read Stabilities for Lower VDDmin Applications

4. Low-k interconnect stack with metal-insulator-metal capacitors for 22nm high volume manufacturing;ingerly;Proc IEEE Int Interconnect Technol Conf,2012

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