Logic synthesis of multilevel circuits with concurrent error detection

Author:

Touba N.A.,McCluskey E.J.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 84 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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3. CICADA: A New Tool to Design Circuits with Correction and Detection Abilities;2021 International Siberian Conference on Control and Communications (SIBCON);2021-05-13

4. An Implication-based Test Scheme for Both Diagnosis and Concurrent Error Detection Applications;ACM Transactions on Design Automation of Electronic Systems;2020-01-29

5. Perfect Concurrent Fault Detection in CMOS Logic Circuits Using Parity Preservative Reversible Gates;IEEE Access;2019

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