Ferroelectric and Interlayer Co-optimization with In-depth Analysis for High Endurance FeFET
Author:
Affiliation:
1. Peking University,School of Integrated Circuits,Beijing,China,100871
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10019319/10019320/10019465.pdf?arnumber=10019465
Reference12 articles.
1. Wakeup-Free and Endurance-Robust Ferroelectric Field-Effect Transistor Memory Using High Pressure Annealing
2. Non-Volatile Ferroelectric FETs Using 5-nm Hf0.5Zr0.5O2 With High Data Retention and Read Endurance for 1T Memory Applications
3. Challenges to Partial Switching of Hf0.8Zr0.2O2 Gated Ferroelectric FET for Multilevel/Analog or Low-Voltage Memory Operation
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1. In-Depth Understanding of Nitridation-Induced Endurance Enhancement in FeFETs: Defect Properties and Dynamics Characterized by Nonradiative Multi-Phonon Model;IEEE Transactions on Electron Devices;2024-09
2. Influence of XeCl excimer laser annealing on the ferroelectric nondoped HfO2 formation deposited on a Si(100) substrate;Japanese Journal of Applied Physics;2024-08-01
3. Study of Endurance Performance of SiO2 Interfacial Layer Scaling Through O Scavenging in Si Channel n-FeFET With Si:HfO2 Ferroelectric Layer;IEEE Transactions on Electron Devices;2024-08
4. Role of Nitrogen in Suppressing Interfacial States Generation and Improving Endurance in Ferroelectric Field-Effect Transistors;IEEE Transactions on Electron Devices;2024-08
5. Impact of Doped Hafnium Oxides on Memory Window and Low-Frequency Noise in Ferroelectric FETs;IEEE Transactions on Electron Devices;2024-07
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