AI Computing in Light of 2.5D Interconnect Roadmap: Big-Little Chiplets for In-memory Acceleration
Author:
Affiliation:
1. Arizona State University,AZ,USA
2. University of Wisconsin-Madison,WI,USA
Funder
Semiconductor Research Corporation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10019319/10019320/10019406.pdf?arnumber=10019406
Reference21 articles.
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Exploiting 2.5D/3D Heterogeneous Integration for AI Computing;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22
2. 3-D In-Sensor Computing for Real-Time DVS Data Compression: 65-nm Hardware-Algorithm Co-Design;IEEE Solid-State Circuits Letters;2024
3. HyDe: A Hybrid PCM/FeFET/SRAM Device-Search for Optimizing Area and Energy-Efficiencies in Analog IMC Platforms;IEEE Journal on Emerging and Selected Topics in Circuits and Systems;2023-12
4. End-to-End Benchmarking of Chiplet-Based In-Memory Computing;Neuromorphic Computing;2023-11-15
5. Benchmarking Heterogeneous Integration with 2.5D/3D Interconnect Modeling;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24
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