A Gb/s parallel block-based Viterbi decoder for convolutional codes on GPU
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7736509/7752440/07752638.pdf?arnumber=7752638
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Design of Convolutional Encoder for Multivalued Logic;Data-Intensive Research;2024
2. Hardware Acceleration of a Fully Parallel Viterbi Decoder Architecture for Narrow Band IOT;2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2022-10-24
3. High-Speed SC Decoder for Polar Codes achieving 1.7 Tb/s in 28 nm CMOS;2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC);2022-10-03
4. A High-throughput Parallel Viterbi Algorithm via Bitslicing;ACM Transactions on Parallel Computing;2021-12-31
5. Upgrading an analog recovery loop for optimized decoding jointly to an increased data rate;Telecommunication Systems;2021-06-21
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