Coupling-Aware Length-Ratio-Matching Routing for Capacitor Arrays in Analog Integrated Circuits

Author:

Ho Kuan-Hsien,Ou Hung-Chih,Chang Yao-Wen,Tsao Hui-Fang

Funder

IBM

SpringSoft

TSMC

MediaTek

Academia Sinica

NSC of Taiwan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Constructive Placement and Routing for Common-Centroid Capacitor Arrays in Binary-Weighted and Split DACs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-09

2. On Automating Finger-Cap Array Synthesis with Optimal Parasitic Matching for Custom SAR ADC;Proceedings of the 28th Asia and South Pacific Design Automation Conference;2023-01-16

3. On Optimizing Capacitor Array Design for Advanced Node SAR ADC;2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD);2022-06-12

4. PASTEL: Parasitic Matching-Driven Placement and Routing of Capacitor Arrays With Generalized Ratios in Charge-Redistribution SAR-ADCs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2020-07

5. Learning From Cross-Domain Media Streams for Event-of-Interest Discovery;IEEE Transactions on Multimedia;2018-01

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