Layout-Driven Post-Placement Techniques for Temperature Reduction and Thermal Gradient Minimization-Reference-Cited by-同舟云学术

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Layout-Driven Post-Placement Techniques for Temperature Reduction and Thermal Gradient Minimization

Published:2013-03 Issue:3 Volume:32 Page:406-418
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Liu Wei,Calimera Andrea,Macii Alberto,Macii Enrico,Nannarelli Alberto,Poncino Massimo

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx5/43/6461966/06461982.pdf?arnumber=6461982

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Thermal Management for 3D-Stacked Systems via Unified Core-Memory Power Regulation;ACM Transactions on Embedded Computing Systems;2023-09-09

2. Oscillating Heat Pipes Technology Roadmap;ASCEND 2022;2022-10-15

3. CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems;ACM Transactions on Architecture and Code Optimization;2022-08-22

4. CoreMemDTM: Integrated Processor Core and 3D Memory Dynamic Thermal Management for Improved Performance;2022 Design, Automation & Test in Europe Conference & Exhibition (DATE);2022-03-14

5. Hotspot Mitigation through Multi-Row Thermal-aware Re-Placement of Logic Cells based on High-Level Synthesis Scheduling;2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC);2022-01-17

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