Hotspot Mitigation through Multi-Row Thermal-aware Re-Placement of Logic Cells based on High-Level Synthesis Scheduling-Reference-Cited by-同舟云学术

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Hotspot Mitigation through Multi-Row Thermal-aware Re-Placement of Logic Cells based on High-Level Synthesis Scheduling

Published:2022-01-17 Issue: Volume: Page:
ISSN:
Container-title:2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)
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Author:

Schafer Benjamin Carrion¹

Affiliation:

1. The University of Texas at Dallas,Department of Electrical and Computer Engineering

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9712466/9712479/09712546.pdf?arnumber=9712546

Reference15 articles.

1. Fast thermal-aware floorplanning using white-space optimization

2. An Integrated Approach to Thermal Management in High-Level Synthesis

3. Hotspots Elimination and Temperature Flattening in VLSI Circuits

4. Temperature-Aware Compilation for VLIWProcessors

5. ThermPL: Thermal-aware placement based on thermal contribution and locality

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