CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems

Author:

Siddhu Lokesh1ORCID,Kedia Rajesh2ORCID,Pandey Shailja1ORCID,Rapp Martin3ORCID,Pathania Anuj4ORCID,Henkel Jörg3ORCID,Panda Preeti Ranjan1ORCID

Affiliation:

1. Department of CSE, Indian Institute of Technology Delhi, New Delhi, Delhi, India

2. Department of CSE, Indian Institute of Technology Hyderabad, Kandi, Telangana, India

3. Chair for Embedded System (CES), Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany

4. Informatics Departments, University of Amsterdam, Amsterdam, Netherlands

Abstract

Processing cores and the accompanying main memory working in tandem enable modern processors. Dissipating heat produced from computation remains a significant problem for processors. Therefore, the thermal management of processors continues to be an active subject of research. Most thermal management research is performed using simulations, given the challenges in measuring temperatures in real processors. Fast yet accurate interval thermal simulation toolchains remain the research tool of choice to study thermal management in processors at the system level. However, the existing toolchains focus on the thermal management of cores in the processors, since they exhibit much higher power densities than memory. The memory bandwidth limitations associated with 2D processors lead to high-density 2.5D and 3D packaging technology: 2.5D packaging technology places cores and memory on the same package; 3D packaging technology takes it further by stacking layers of memory on the top of cores themselves. These new packagings significantly increase the power density of the processors, making them prone to overheating. Therefore, mitigating thermal issues in high-density processors (packaged with stacked memory) becomes even more pressing. However, given the lack of thermal modeling for memories in existing interval thermal simulation toolchains, they are unsuitable for studying thermal management for high-density processors. To address this issue, we present the first integrated Core and Memory interval Thermal ( CoMeT ) simulation toolchain. CoMeT comprehensively supports thermal simulation of high- and low-density processors corresponding to four different core-memory (integration) configurations—off-chip DDR memory, off-chip 3D memory, 2.5D, and 3D. CoMeT supports several novel features that facilitate overlying system research. CoMeT adds only an additional ~5% simulation-time overhead compared to an equivalent state-of-the-art core-only toolchain. The source code of CoMeT has been made open for public use under the MIT license.

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Information Systems,Software

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1. NeuroTAP: Thermal and Memory Access Pattern-Aware Data Mapping on 3D DRAM for Maximizing DNN Performance;ACM Transactions on Embedded Computing Systems;2024-09-11

2. 3D-TemPo: Optimizing 3-D DRAM Performance Under Temperature and Power Constraints;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-08

3. Lifetime Estimation for Core-Failure Resilient Multi-Core Processors;2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2023-12-18

4. NeuroCool: Dynamic Thermal Management of 3D DRAM for Deep Neural Networks through Customized Prefetching;ACM Transactions on Design Automation of Electronic Systems;2023-12-18

5. VarSim: A fast process variation-aware thermal modeling methodology using Green’s functions;Microelectronics Journal;2023-12

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