An industrial case study of analog fault modeling
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx5/5772241/5783722/05783780.pdf?arnumber=5783780
Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Hierarchical Fault Simulation for Mixed-Signal Circuits Using Template Based Fault Response Modeling;2024 IEEE European Test Symposium (ETS);2024-05-20
2. Analog Defect Injection and Fault Simulation Techniques: A Systematic Literature Review;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-01
3. Verilog-A Implementation of Generic Defect Templates for Analog Fault Injection;Proceedings of the Great Lakes Symposium on VLSI 2023;2023-06-05
4. Evaluating Fault Coverage of Structural and Specification-based Tests Obtained With a Low-Cost Analog TPG Tool;2022 IEEE 23rd Latin American Test Symposium (LATS);2022-09-05
5. Digital Fault-based Built-in Self-test and Evaluation of Low Dropout Voltage Regulators;ACM Journal on Emerging Technologies in Computing Systems;2022-07-31
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