Affiliation:
1. Arizona State University, Tempe, AZ
Abstract
With increasing pressure to obtain near-zero defect rates, there is a need to explore built-in self-test and other non-traditional test techniques for embedded mixed-signal components, such as PLLs, power converters, and data converters. This article presents an extremely low-cost built-in self-test technique for LDOs, specifically designed for fault detection. The methodology relies on exciting the LDO loop at the voltage reference input via a pseudo-random signal with white noise characteristics and observing the response from the output of LDO via all-digital circuitry, thereby inducing low area and performance overhead. The BIST circuit along with an LDO as a device under test is designed in 65nm technology. Fault simulations performed at the transistor level show that all resistive open/short defects in circuit components can be detected even if they do not cause a catastrophic failure in the LDO response. The proposed technique is validated with hardware using off-the-shelf components.
Funder
National Science Foundation
Semiconductor Research Corporation
Publisher
Association for Computing Machinery (ACM)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Reference30 articles.
1. Defect-Oriented Testing of RF Circuits
2. Abdullah Ash-Saki and Swaroop Ghosh. 2018. How multi-threshold designs can protect analog IPs. In 2018 IEEE 36th International Conference on Computer Design (ICCD’18). IEEE, 464–471.
3. Improved Online Identification of a DC–DC Converter and Its Control Loop Gain Using Cross-Correlation Methods
4. N. Beohar, P. Bakliwal, S. Roy, D. Mandal, P. Adell, B. Vermeire, B. Bakkaloglu, and S. Ozev. 2015. Disturbance-free BIST for loop characterization of DC-DC buck converters. In 2015 IEEE 33rd VLSI Test Symposium (VTS’15). 1–6.
5. Online Built-In Self-Test of High Switching Frequency DC–DC Converters Using Model Reference Based System Identification Techniques
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