Verilog-A Implementation of Generic Defect Templates for Analog Fault Injection
Author:
Affiliation:
1. University of Verona, Verona, Italy
2. University of North Carolina at Chapel Hill, Chapel Hill, NC, USA
3. Sydelity B.V., Kruisem, Belgium
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3583781.3590317
Reference15 articles.
1. Fault injection in mixed-signal environment using behavioral fault modeling in Verilog-A
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3. Predictive Fault Grouping based on Faulty AC Matrices
4. Siemens EDA. 2023. Tessent DefectSim. https://eda.sw.siemens.com/en-US/ic/ tessent/test/defectsim/ Siemens EDA. 2023. Tessent DefectSim. https://eda.sw.siemens.com/en-US/ic/ tessent/test/defectsim/
5. Effective DC fault models and testing approach for open defects in analog circuits
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1. Analog Fault Simulation: Trends and Perspectives in Analog Hardware Description Languages;2024 IEEE 25th Latin American Test Symposium (LATS);2024-04-09
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