1. A Novel 1-bit Fast and Low Power 17-T Full Adder Circuit;2024 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS);2024-02-24
2. Design of Full Adder Circuits with Optimized Power and Speed Using CMOS Technique;2024 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS);2024-02-24
3. A Novel 1-bit Fast and Low Power 19-T Full Adder Circuit at 45 nm Technology Node;2024 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS);2024-02-24
4. Efficiency and Speed Trade-Offs in 8-Bit CMOS Adders at 180nm: An In-Depth Examination;2023 IEEE International Conference on Recent Advances in Systems Science and Engineering (RASSE);2023-11-08
5. An Efficient Full Adder by Investigating XOR and XNOR Logics with PMOS and NMOS;2023 3rd International Conference on Pervasive Computing and Social Networking (ICPCSN);2023-06