A low-jitter mixed-mode DLL for high-speed DRAM applications-Reference-Cited by-同舟云学术

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A low-jitter mixed-mode DLL for high-speed DRAM applications

Published:2000-10 Issue:10 Volume:35 Page:1430-1436
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Jae Joon Kim ,Sang-Bo Lee ,Tae-Sung Jung ,Chang-Hyun Kim ,Soo-In Cho ,Beomsup Kim

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/18873/00871319.pdf?arnumber=871319

Cited by 26 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A low-power low-jitter DLL with a differential closed-loop duty cycle corrector;Analog Integrated Circuits and Signal Processing;2017-05-05

2. A High-Resolution Dual-Loop Digital DLL;JSTS:Journal of Semiconductor Technology and Science;2016-08-30

3. All-Digital 90° Phase-Shift DLL With Dithering Jitter Suppression Scheme;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2016-03

4. A 80-MHz-to-410-MHz 16-Phases DLL Based on Improved Dead-Zone Open-Loop Phase Detector and Reduced-Gain Charge Pump;Journal of Circuits, Systems and Computers;2014-11-10

5. A Fast-Lock, Jitter Filtering All-Digital DLL Based Burst-Mode Memory Interface;IEEE Journal of Solid-State Circuits;2014-04

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