Linked Faults in Random Access Memories: Concept, Fault Models, Test Algorithms, and Industrial Results

Author:

Hamdioui S.,Al-Ars Z.,van de Goor A.J.,Rodgers M.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 34 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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4. A New Fail Address Memory Architecture for Cost-Effective ATE;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023

5. Fault-coverage Maximizing March Tests for Memory Testing;2022 IEEE International Test Conference (ITC);2022-09

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