Author:
Pomeranz Irith,Reddy Sudhakar M.
Cited by
4 articles.
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1. Modeling Faults as Addresses;2023 IEEE East-West Design & Test Symposium (EWDTS);2023-09-22
2. Enhanced DFT for Fortuitous Detection of Transition Faults During Scan Shift;2022 IEEE 31st Microelectronics Design & Test Symposium (MDTS);2022-05-23
3. Harzard-Based ATPG for Improving Delay Test Quality;Journal of Electronic Testing;2015-01-11
4. An efficient small-delay faults simulator based on critical path tracing;International Journal of Circuit Theory and Applications;2014-04-16