In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures
Author:
Affiliation:
1. University of Bremen,Institute of Computer Science,Germany
2. Kalinga Institute of Industrial Technology,Bhubaneswar,India
3. German Research Centre for Artificial Intelligence (DFKI),Bremen,Germany
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10483275/10483296/10483380.pdf?arnumber=10483380
Reference10 articles.
1. ‘Memristive’ switches enable ‘stateful’ logic operations via material implication
2. Automated equivalence checking method for majority based in-memory computing on reram crossbars;Deb
3. Self-Verification as the Key Technology for Next Generation Electronic Systems
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1. Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification;Proceedings of the Great Lakes Symposium on VLSI 2024;2024-06-12
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