±CIM SRAM for Signed In-Memory Broad-Purpose Computing From DSP to Neural Processing

Author:

Jain SaurabhORCID,Lin LongyangORCID,Alioto MassimoORCID

Funder

NRF, Singapore

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Power-Aware Neuromorphic Architecture With Partial Voltage Scaling 3-D Stacking Synaptic Memory;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

2. WDVR-RAM: A 0.25–1.2 V, 2.6–76 POPS/W Charge-Domain In-Memory-Computing Binarized CNN Accelerator for Dynamic AIoT Workloads;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-10

3. A 47 TOPS/W 10T SRAM-Based Multi-Bit Signed CIM With Self-Adaptive Bias Voltage Generator for Edge Computing Applications;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-09

4. A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-06

5. A 28 nm 16 Kb Bit-Scalable Charge-Domain Transpose 6T SRAM In-Memory Computing Macro;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-05

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